The package of a semiconductor device is classified into two, including a ceramic package and a plastic package. The former has a large magnitude of reliability and the latter has an advantage in the economic aspects. Insofar as semiconductor devices employed for an IC, a memory card or the like are concerned, a plastic package is predominantly employed, because the plastic package can be thin and small in size, in addition to that the cost thereof is fairly less expensive.
Referring to FIGS. 1 through 5, the structure of an example of a small outline nonlead package available in the prior art and drawbacks involved with the structure will be briefed below.
Referring to FIGS. 1 through 3, each of leads 5 arranged in parallel to one another on the top surface of a semiconductor device chip 3 are bonded with each of pads 4 employing an Au wire 7. The semiconductor device chip 3 is molded with a resin, or a plastic material. As a result, the top and side surfaces of the semiconductor device chip 3 is covered by a resin mold 9. Since the external ends of the leads 5 are designed not to extend beyond the side surface of the molded resin 9, as is illustrated in FIGS. 1 and 2 and since the bottom surface of the semiconductor device chip 3 is not covered by the resin mold 9, the semiconductor device packaged in the foregoing small outline nonlead package available in the prior art has an advantage that the horizontal area is small and the thickness is thin.
Referring to FIGS.2 and 3, the top surface 5a of the lead 5 is flush with the top surface 9a of the resin mold 9. This caused three drawbacks for a semiconductor device packaged in the small outline nonlead package available in the prior art. The first drawback is a rather short insulation distance between the leads 5, causing rather large possibilities in which the neighboring leads 5 are short circuited. It is noted is that a straight line connecting two points represents the shortest distance between the two points. The second drawback is a tendency in which neighboring two leads 5 are readily short circuited by foreign materials 13 laid on the top surface 9a of the resin mold 9 in a manner to bridge the neighboring two leads 5, causing large possibilities in which the neighboring leads 5 are short circuited, as is illustrated in FIG. 4 which illustrates a side view of a semiconductor device packaged in a plastic package available in the prior art which is mounted on a printed board 11 in a face down position. The third drawback is a tendency in which a resin flows along the top surface 5a of the lead 5 to produce a burr 15 of the resin illustrated in FIG. 5, during a molding process. In the drawing, the reference numeral 9 indicates shows a resin mold. The resin burr 15 readily causes less conductivity for the leads 5 or large possibility in which the surface conductivity is reduced by the resin burr 15 spreading on the top surface 5a of the lead 5.